CWE-1332: Improper Handling of Faults that Lead to Instruction Skips
Weakness ID: 1332
Vulnerability Mapping:ALLOWEDThis CWE ID may be used to map to real-world vulnerabilities Abstraction:
BaseBase - a weakness that is still mostly independent of a resource or technology, but with sufficient details to provide specific methods for detection and prevention. Base level weaknesses typically describe issues in terms of 2 or 3 of the following dimensions: behavior, property, technology, language, and resource.
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Description
The device is missing or incorrectly implements circuitry or sensors that detect and mitigate the skipping of security-critical CPU instructions when they occur.
Extended Description
The operating conditions of hardware may change
in ways that cause unexpected behavior to occur,
including the skipping of security-critical CPU
instructions. Generally, this can occur due to
electrical disturbances or when the device operates
outside of its expected conditions.
In practice, application code may contain
conditional branches that are security-sensitive (e.g.,
accepting or rejecting a user-provided password). These
conditional branches are typically implemented by a
single conditional branch instruction in the program
binary which, if skipped, may lead to effectively
flipping the branch condition - i.e., causing the wrong
security-sensitive branch to be taken. This affects
processes such as firmware authentication, password
verification, and other security-sensitive decision
points.
Attackers can use fault injection techniques to
alter the operating conditions of hardware so that
security-critical instructions are skipped more
frequently or more reliably than they would in a
"natural" setting.
Common Consequences
This table specifies different individual consequences
associated with the weakness. The Scope identifies the application security area that is
violated, while the Impact describes the negative technical impact that arises if an
adversary succeeds in exploiting this weakness. The Likelihood provides information about
how likely the specific consequence is expected to be seen relative to the other
consequences in the list. For example, there may be high likelihood that a weakness will be
exploited to achieve a certain impact, but a low likelihood that it will be exploited to
achieve a different impact.
Scope
Impact
Likelihood
Confidentiality Integrity Authentication
Technical Impact: Bypass Protection Mechanism; Alter Execution Logic; Unexpected State
Depending on the context, instruction skipping can
have a broad range of consequences related to the
generic bypassing of security critical code.
High
Potential Mitigations
Phase: Architecture and Design
Design strategies for ensuring safe failure if
inputs, such as Vcc, are modified out of acceptable
ranges.
Phase: Architecture and Design
Design strategies for ensuring safe behavior if
instructions attempt to be skipped.
Phase: Architecture and Design
Identify mission critical secrets that should
be wiped if faulting is detected, and design a
mechanism to do the deletion.
Phase: Implementation
Add redundancy by performing an operation
multiple times, either in space or time, and perform
majority voting. Additionally, make conditional
instruction timing unpredictable.
Phase: Implementation
Use redundant operations or canaries to
detect and respond to faults.
Phase: Implementation
Ensure that fault mitigations are strong enough
in practice. For example, a low power detection
mechanism that takes 50 clock cycles to trigger at lower
voltages may be an insufficient security mechanism if
the instruction counter has already progressed with no
other CPU activity occurring.
Relationships
This table shows the weaknesses and high level categories that are related to this
weakness. These relationships are defined as ChildOf, ParentOf, MemberOf and give insight to
similar items that may exist at higher and lower levels of abstraction. In addition,
relationships such as PeerOf and CanAlsoBe are defined to show similar weaknesses that the user
may want to explore.
Relevant to the view "Research Concepts" (CWE-1000)
Nature
Type
ID
Name
ChildOf
Class - a weakness that is described in a very abstract fashion, typically independent of any specific language or technology. More specific than a Pillar Weakness, but more general than a Base Weakness. Class level weaknesses typically describe issues in terms of 1 or 2 of the following dimensions: behavior, property, and resource.
This table shows the weaknesses and high level categories that are related to this
weakness. These relationships are defined as ChildOf, ParentOf, MemberOf and give insight to
similar items that may exist at higher and lower levels of abstraction. In addition,
relationships such as PeerOf and CanAlsoBe are defined to show similar weaknesses that the user
may want to explore.
Relevant to the view "Hardware Design" (CWE-1194)
Nature
Type
ID
Name
MemberOf
Category - a CWE entry that contains a set of other entries that share a common characteristic.
Base - a weakness that is still mostly independent of a resource or technology, but with sufficient details to provide specific methods for detection and prevention. Base level weaknesses typically describe issues in terms of 2 or 3 of the following dimensions: behavior, property, technology, language, and resource.
The different Modes of Introduction provide information
about how and when this
weakness may be introduced. The Phase identifies a point in the life cycle at which
introduction
may occur, while the Note provides a typical scenario related to introduction during the
given
phase.
Phase
Note
Architecture and Design
Failure to design appropriate countermeasures to common fault injection techniques can manifest this weakness.
Implementation
This weakness can arise if the hardware design incorrectly implements countermeasures to prevent fault injection.
Applicable Platforms
This listing shows possible areas for which the given
weakness could appear. These
may be for specific named Languages, Operating Systems, Architectures, Paradigms,
Technologies,
or a class of such platforms. The platform is listed along with how frequently the given
weakness appears for that instance.
Languages
Class: Not Language-Specific
(Undetermined Prevalence)
Operating Systems
Class: Not OS-Specific
(Undetermined Prevalence)
Architectures
Class: Not Architecture-Specific
(Undetermined Prevalence)
Technologies
Class: System on Chip
(Undetermined Prevalence)
Demonstrative Examples
Example 1
A smart card contains authentication credentials that are used as authorization to enter a building. The credentials are only accessible when a correct PIN is presented to the card.
(bad code)
The card emits the credentials when a voltage anomaly is injected into the power line to the device at a particular time after providing an incorrect PIN to the card, causing the internal program to accept the incorrect PIN.
There are several ways this weakness could be fixed.
(good code)
add an internal filter or internal power supply in series with the power supply pin on the device
add sensing circuitry to reset the device if out of tolerance conditions are detected
add additional execution sensing circuits to monitor the execution order for anomalies and abort the action or reset the device under fault conditions
(where the weakness exists independent of other weaknesses)
Detection
Methods
Automated Static Analysis
This weakness can be found using automated static analysis once a developer has indicated which code paths are critical to protect.
Effectiveness: Moderate
Simulation / Emulation
This weakness can be found using automated dynamic analysis. Both emulation of a CPU with instruction skips, as well as RTL simulation of a CPU IP, can indicate parts of the code that are sensitive to faults due to instruction skips.
Effectiveness: Moderate
Manual Analysis
This weakness can be found using manual (static) analysis. The analyst has security objectives that are matched against the high-level code. This method is less precise than emulation, especially if the analysis is done at the higher level language rather than at assembly level.
Effectiveness: Moderate
Functional Areas
Power
Memberships
This MemberOf Relationships table shows additional CWE Categories and Views that
reference this weakness as a member. This information is often useful in understanding where a
weakness fits within the context of external information sources.
Nature
Type
ID
Name
MemberOf
Category - a CWE entry that contains a set of other entries that share a common characteristic.
(this CWE ID may be used to map to real-world vulnerabilities)
Reason:
Acceptable-Use
Rationale:
This CWE entry is at the Base level of abstraction, which is a preferred level of abstraction for mapping to the root causes of vulnerabilities.
Comments:
Carefully read both the name and description to ensure that this mapping is an appropriate fit. Do not try to 'force' a mapping to a lower-level Base/Variant simply to comply with this preferred level of abstraction.
[REF-1161] Josep Balasch, Benedikt Gierlichs and Ingrid Verbauwhede. "An In-depth and Black-box Characterization of the Effects of Clock Glitches on 8-bit MCUs". 2011 Workshop on Fault Diagnosis and Tolerance in Cryptography (IEEE). 2011-09.
<https://ieeexplore.ieee.org/document/6076473>.
[REF-1222] Alexandre Menu, Jean-Max Dutertre, Olivier Potin and Jean-Baptiste Rigaud. "Experimental Analysis of the Electromagnetic Instruction Skip Fault Model". IEEE Xplore. 2020-04-30.
<https://ieeexplore.ieee.org/document/9081261>.
Description
This table specifies different individual consequences
associated with the weakness. The Scope identifies the application security area that is
violated, while the Impact describes the negative technical impact that arises if an
adversary succeeds in exploiting this weakness. The Likelihood provides information about
how likely the specific consequence is expected to be seen relative to the other
consequences in the list. For example, there may be high likelihood that a weakness will be
exploited to achieve a certain impact, but a low likelihood that it will be exploited to
achieve a different impact.
